Relevant Projects

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Energy Harvesting Chip
Battery-less Temperature Sensor

Energy Harvesting Chip

  • Engineered battery-less temperature sensor, with energy harvesting circuit, and power management unit.
  • Created schematics and test benches for low energy RF wake up circuit and demonstrated backscattering.
  • Achieved accurate analog-to-digital conversion of temperature sensor readings from -33°C to 30°C.
📄 Write-up
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Low Power Memory Array
SRAM Optimization Project

Low Power Memory Array

  • Created low power static random-access memory (SRAM) array allowing efficient read/write operations for 16-bits using Cadence Virtuoso.
  • Optimized energy consumption, achieving 34.31 microwatts (schematic) and 45 microwatts (layout) equivalent to 2.14 microwatts and 2.81 microwatts per single-bit read/write.
  • Designed schematics and testbench for a 4x4 6T SRAM array, including sense amplifiers, bit line pre-charge, and write circuits for each column.
📄 Write-up
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Neural Processing Unit
Low Power VLSI Design

Neural Processing Unit

  • Researched and implemented a custom Neural Processing Unit (NPU) using Verilog and Cadence Innovus to perform convolution and ReLU operations.
  • Designed a 4×5 processing element array with on-chip buffers to reduce computation overhead.
  • Validated functionality by comparing hardware-generated outputs with PyTorch’s Conv2D results.
📄 Write-up
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Autonomous Robot Manipulator
Robotic Navigation & Control

Autonomous Robot Manipulator

  • Designed and implemented algorithms for autonomous navigation to user-defined locations and object retrieval using a robotic arm mounted on a mobile platform.
  • Interfaced and tested multiple microcontrollers, perception sensors, and linear actuators in Linux environment for obstacle avoidance and path planning.
  • Conducted iterative design refinements to optimize obstacle detection and robotic arm positioning accuracy.
⚡ Code 🎥 Demo
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Digilent Nexys 4 DDR FPGA Projects
VHDL Design & Implementation

FPGA Projects with VHDL

  • Developed and validated ALU and a Parameterized Carry Save Multiplier using Xilinx Vivado.
  • Built a Vending Machine Subsystem using a Finite State Machine and Arithmetic State Machine on Xilinx Vivado.
  • Conducted research on ASIC FPGA, BIST, Timing Analysis, and different architectures for VHDL FPGA design.
⚡ Code 📋 Report